Human-Verified | May,2026 | Reading Time: 12 Minutes

Introduction: The Biggest Leap in GPU History Just Got a Name

In January 2026, Jensen Huang stood on a stage at CES in Las Vegas and said something that would have been considered science fiction three years earlier: that NVIDIA's next-generation platform would deliver 10x lower inference token costs than its current flagship — the Blackwell architecture that had itself redefined what AI hardware could do just one year prior.

The platform he announced is called Vera Rubin — named after the pioneering astrophysicist whose observations provided the first compelling evidence for dark matter, an invisible force shaping everything we see. The naming feels deliberate. Vera Rubin, the GPU platform, is built around a force that is quietly reshaping the economics of AI: inference efficiency.

Vera Rubin is not a single chip. It is a seven-chip, rack-scale AI supercomputer — a platform that brings together a new GPU, a new CPU, new networking silicon, a new storage processor, and, most surprisingly, a newly acquired inference accelerator from a company that NVIDIA purchased for approximately $29 billion on Christmas Eve 2025.

This is the most comprehensive and ambitious architecture NVIDIA has ever released. Here is everything you need to know about it — from the transistor counts to the token economics, from the chip specifications to the strategic decisions that shaped every design choice.

Part One: Why Blackwell Needed a Successor Already

The Inference Economics Problem

Blackwell was a generational leap when it shipped. The B200's 192 GB of HBM3e, 20 petaFLOPS of sparse FP4 compute, and the GB200 NVL72's rack-scale architecture raised the bar for AI compute in 2025 and drove genuine acceleration across the industry.

But Blackwell was designed primarily for a world where training was the dominant AI workload. As AI has matured through 2025 and into 2026, the center of gravity in AI infrastructure spending has shifted from training — the months-long process of building a model — to inference, the continuous real-time serving of that model to billions of users and hundreds of millions of agentic AI tasks.

Inference has different constraints than training. It is latency-sensitive where training is throughput-sensitive. It runs continuously where training runs in bursts. It requires the ability to handle millions of concurrent sessions, each generating tokens one by one in a sequential process that standard GPU architectures handle less efficiently than the parallel matrix operations of training.

NVIDIA recognized this shift. The entire Vera Rubin architecture is its answer to it.

The Agentic Inflection Point

There is a second driver behind Vera Rubin's design: the rise of agentic AI.

In 2024, AI systems primarily responded to single queries. By 2026, the fastest-growing category of AI workloads involves agents — autonomous AI systems that maintain state across long context windows, take multiple steps to accomplish goals, interact with other agents, and generate not just individual responses but extended reasoning chains that can span hundreds of thousands of tokens.

Agentic AI has fundamentally different infrastructure requirements. Long-context processing — handling inputs and outputs of one million tokens or more — demands memory capacity, bandwidth, and low-latency token generation at a scale that Blackwell-era hardware could provide, but not efficiently enough to make the economics of trillion-parameter model serving work at commercial scale.

Vera Rubin is explicitly designed for this era. As Jensen Huang described it at GTC 2026: "The agentic AI inflection point has arrived with Vera Rubin kicking off the greatest infrastructure buildout in history."

Part Two: The Seven Chips — What Vera Rubin Actually Is

Vera Rubin is not a GPU upgrade. It is a complete, co-designed AI factory platform built from seven purpose-built chips, each optimized for a specific role in the AI computation pipeline.

1. The Rubin GPU (VR200) — The Compute Engine

The Rubin GPU is the centerpiece of the platform, and its specifications represent the largest single-generation leap NVIDIA has ever achieved in AI compute performance.

The VR200 GPU packs 336 billion transistors — compared to Blackwell's 208 billion — built on TSMC's 3nm process from two reticle-scale dies. It carries 288 GB of HBM4 memory with 22 TB/s of memory bandwidth — a 2.8x improvement over Blackwell's 8 TB/s, enabled by Micron's HBM4 36 GB modules which confirmed high-volume production specifically for the Rubin architecture.

The compute figures are staggering: 50 petaFLOPS of NVFP4 inference performance and 35 petaFLOPS of NVFP4 training performance per chip. The inference figure is 5x the Blackwell GB200's performance and 3.3x higher than the Blackwell Ultra B300's FP4 output at equal memory capacity.

The gains come from two reinforcing sources: HBM4's 22 TB/s bandwidth more than doubles the memory subsystem throughput available per compute cycle, while the Rubin compute die built on TSMC 3nm pushes more FP4 throughput per clock than any NVIDIA silicon preceding it.

2. The Vera CPU — The Agent Era Processor

Blackwell was paired with NVIDIA's Grace ARM CPU. Vera Rubin introduces a new custom processor: the Vera CPU, designed from the ground up for the demands of agentic AI workloads — not just general computation.

The Vera CPU carries 227 billion transistors built on custom Arm "Olympus" cores, with 88 cores and 176 threads using NVIDIA Spatial Multi-Threading. It supports up to 1.5 TB of LPDDR5x memory with 1.2 TB/s of memory bandwidth and connects to Rubin GPUs via coherent NVLink-C2C at 1.8 TB/s, enabling direct cache-coherent access between CPU and GPU memory. NVIDIA claims 2x gains in data processing, compression, and CI/CD pipelines over the prior Grace CPU.

The decision to design a custom CPU alongside the GPU — rather than adopting a third-party design — reflects NVIDIA's belief that the bottleneck in agentic AI inference is increasingly the orchestration and data movement between compute stages, not raw GPU throughput alone.

3. NVLink 6 Switch — The Interconnect Backbone

The NVLink 6 Switch is the fabric that ties 72 Rubin GPUs together in the NVL72 rack, and it is one of the most consequential performance multipliers in the platform.

Each Rubin GPU connects via NVLink 6 at 3.6 TB/s of bidirectional bandwidth — doubling the scale-up bandwidth of the prior generation. Each NVLink 6 switch provides 28 TB/s of bandwidth, and the NVL72 rack contains nine of these switches, delivering 260 TB/s of total scale-up bandwidth across the rack — which NVIDIA claims exceeds the aggregate bandwidth of the entire internet.

For Mixture-of-Experts model inference — where tokens are routed across different "expert" modules during generation, requiring constant all-to-all GPU communication — NVLink 6's bandwidth and predictable latency are not a nice-to-have. They are the architectural prerequisite for efficient MoE inference at scale.

4. ConnectX-9 SuperNIC — Scale-Out Networking

While NVLink 6 handles GPU-to-GPU communication within a rack, the ConnectX-9 SuperNIC handles communication between racks, clusters, and data centers. NVIDIA's Spectrum-X Ethernet Photonics co-packaged optical switch systems — introduced alongside Vera Rubin — deliver 5x improved power efficiency and 5x longer uptime compared to traditional networking methods, and enable facilities separated by hundreds of kilometers to function as a single AI environment.

5. BlueField-4 DPU — The AI-Native Storage Processor

The BlueField-4 Data Processing Unit introduces a new capability that is specifically designed for the long-context demands of agentic AI: the Inference Context Memory Storage Platform, which manages and shares inference context across users, sessions, and services.

BlueField-4 STX is built by combining the Vera CPU with the ConnectX-9 SuperNIC and extends GPU memory seamlessly across a POD through high-bandwidth shared storage. For AI agents that must maintain state across extended multi-turn reasoning sessions, managing the key-value cache that records that state is a first-order infrastructure problem. BlueField-4 STX addresses it at the hardware level.

BlueField-4 also introduces ASTRA (Advanced Secure Trusted Resource Architecture), a system-level trust architecture providing a single, trusted control point for securely provisioning, isolating, and operating large-scale AI environments without performance penalties.

6. Spectrum-6 Ethernet Switch — The Data Center Fabric

Spectrum-6 completes the networking stack, providing the Ethernet fabric that connects Vera Rubin systems across a data center. The Spectrum-X platform with NVIDIA Spectrum-XGS Ethernet technology enables gigascale AI factories and paves the way for future million-GPU environments.

7. NVIDIA Groq 3 LPU — The Inference Accelerator (The Wild Card)

The seventh chip is the most architecturally surprising and strategically significant component of Vera Rubin: the Groq 3 Language Processing Unit, or LPU — integrated into the platform following NVIDIA's approximately $29 billion acquisition of Groq's core assets in December 2025.

The LPU is a radical architectural departure from every other chip in the Vera Rubin lineup. Where Rubin GPUs use 288 GB of HBM4 with 22 TB/s of memory bandwidth, the Groq 3 LPU uses 500 MB of on-chip SRAM with 150 TB/s of SRAM bandwidth — nearly 7x the bandwidth of HBM4, but at a fraction of the capacity.

This design is purpose-built for the decode phase of AI inference — the sequential, token-by-token generation process that determines how fast a model can "think out loud." Decode is critically bottlenecked by memory bandwidth, not raw compute. The GPU's massive HBM capacity is essential for storing model weights and the KV cache of long contexts, but its bandwidth per token during decode is constrained. The LPU's on-chip SRAM provides bandwidth that makes GPU architectures look sluggish on this specific task.

In the Vera Rubin deployment model, the LPX Rack — housing 256 Groq 3 LPUs — works alongside the NVL72 rack in a division of labor that NVIDIA calls "Attention-FFN Disaggregation" (AFD):

The Vera Rubin NVL72 handles prefill (processing the initial prompt in parallel), KV cache construction, and decode attention. The Groq 3 LPX rack handles decode FFN (Feed-Forward Network) and MoE routing. For a model with 40 decoder layers, this means 40 round trips per token between GPU and LPU, with activations flowing across the two architectures for each token generated.

All of this is orchestrated by NVIDIA Dynamo — an intelligent scheduling layer that routes prefill to GPU workers, manages the per-token AFD loop, and performs KV-aware scheduling so new tokens land on workers that already hold the relevant cache. Critically, NVIDIA confirmed that no changes to CUDA are required. The LPU operates as a transparent accelerator to the existing CUDA stack.

NVIDIA claims this hybrid architecture delivers up to 35x the throughput per watt (versus Grace Blackwell) at a given tokens-per-second-per-user generation rate for trillion-parameter models. As Jonathan Ross, Groq's founder, explained at GTC 2026: "If you run everything on the LPU, you'd be underutilizing it on attention. If you run everything on the GPU, you underutilize it on the FFN layers." The hybrid solves this utilization mismatch.

Part Three: The 10x Inference Cost Claim — What It Means and Where It Comes From

The headline performance claim — 10x lower inference token cost compared to Blackwell — is the most commercially significant figure in NVIDIA's Vera Rubin announcement, and it deserves careful examination.

The Official Source

The claim comes directly from NVIDIA's official press release from CES 2026 and GTC 2026: the Rubin platform "harnesses extreme codesign across hardware and software to deliver up to 10x reduction in inference token cost and 4x reduction in the number of GPUs required to train MoE models, compared with the NVIDIA Blackwell platform."

NVIDIA's official figures also include: 10x more inference throughput per watt and one-tenth the cost per token compared to the Blackwell generation across the full spectrum of AI workloads.

What Drives the Cost Reduction

The 10x cost reduction is not driven by any single chip specification — it emerges from the interaction of several architectural improvements working together.

The raw compute uplift is substantial: 50 PFLOPS FP4 per Rubin GPU versus roughly 9 PFLOPS FP8 (or ~10 PFLOPS FP4) for the B200, representing a roughly 5x per-chip inference compute improvement. At the rack level, the NVL72 delivers 3.6 exaFLOPS of NVFP4 inference, compared to roughly 1 exaFLOP for the GB200 NVL72 — a 3.3x rack-level improvement before accounting for efficiency gains.

HBM4's 22 TB/s bandwidth (versus 8 TB/s for HBM3e in Blackwell) means that memory-bandwidth-limited workloads — which includes most LLM inference at practical batch sizes — can sustain dramatically higher utilization per chip. The reduction in time-per-token from memory bandwidth alone represents a significant fraction of the total cost-per-token reduction.

NVLink 6's doubled bandwidth eliminates inter-GPU communication as a bottleneck for MoE model inference, improving GPU utilization during the all-to-all expert routing that MoE architectures require. The 4x reduction in GPUs required for MoE training reflects this directly: fewer chips wasting time waiting for communication means fewer chips needed to complete the same job.

The Groq 3 LPU integration addresses the decode bottleneck that no GPU architecture could solve efficiently, providing the final layer of inference acceleration for the sequential token generation phase.

And DSX Max-Q — NVIDIA's dynamic power provisioning system, introduced with Vera Rubin — enables 30% more AI infrastructure to be deployed within a fixed-power data center by provisioning power dynamically across the full AI factory rather than allocating peak power statically per chip.

Taken together, more compute per chip, better memory bandwidth, elimination of communication bottlenecks, specialized decode acceleration, and more efficient power provisioning combine to produce the 10x cost-per-token improvement relative to Blackwell.

The Honest Caveat

"Up to 10x" is a ceiling, not a guarantee. As one infrastructure planning guide published in January 2026 puts it: "Up to 10x lower inference cost per token compared to Blackwell (as a platform-level message, not a guarantee for every model)."

Real-world cost-per-token depends on model architecture (dense vs. MoE), context length, batch size, utilization rate, and whether the LPX rack complement is included. Models that benefit most from MoE routing efficiency and the LPX decode acceleration will see improvements closer to the headline figure. Dense models running at low batch sizes may see smaller but still substantial gains.

No independent third-party benchmark has verified the full 10x figure at publication time — Vera Rubin is shipping to select customers in H2 2026 and has not yet been in production long enough for comprehensive independent benchmarking. The figure should be understood as NVIDIA's internal projection, not a confirmed real-world measurement.

Part Four: The Full Vera Rubin Ecosystem — Racks, PODs, and AI Factories

Vera Rubin is not sold as a chip — it is deployed as a system, and understanding the system configurations is essential for organizations evaluating the platform.

NVL72 — The Entry Point

The flagship Vera Rubin NVL72 combines 72 Rubin GPUs and 36 Vera CPUs connected through NVLink 6, with supporting ConnectX-9 SuperNICs, BlueField-4 DPUs, and Spectrum-6 Ethernet switches. It is fully liquid-cooled and exceeds 200 kW per rack — a significant infrastructure requirement. The NVL72 delivers 3.6 exaFLOPS of NVFP4 inference and 2.5 exaFLOPS of training, with 20.7 TB of HBM4 capacity across the rack.

LPX Rack — The Decode Accelerator

The LPX Rack houses 256 Groq 3 LPUs, delivering 128 GB of SRAM for low-latency processing and 12 TB of DDR5 memory for large model support. At the rack level, LPX provides 40 petabytes per second of SRAM bandwidth, with direct chip-to-chip links delivering 640 TB/s of scale-up bandwidth across the rack. NVIDIA suggests organizations dedicate roughly 25% of their AI factory footprint to LPX racks for workloads heavy in interactive token generation.

NVL144 CPX — The Long-Context Specialist

The Vera Rubin NVL144 CPX platform introduces the Rubin CPX, a dedicated GPU variant designed for massive-context inference — specifically the prefill stage of processing prompts of one million tokens or more. The NVL144 CPX delivers 8 exaFLOPS of AI performance and 100 TB of fast memory in a single rack, with 1.7 petabytes per second of memory bandwidth. NVIDIA projects $5 billion in token revenue for every $100 million invested in NVL144 CPX infrastructure.

The Rubin CPX uses 128 GB of cost-efficient GDDR7 memory (rather than HBM4) and delivers 30 petaFLOPS of NVFP4 compute, optimized for attention computation during the prefill phase. The NVL144 CPX provides 7.5x more AI performance than NVIDIA GB300 NVL72 systems and delivers 3x faster attention computation for long-context workloads.

The Vera Rubin POD and AI Factory

At the largest scale, NVIDIA introduces the Vera Rubin POD — 40 NVL72 racks assembled into a unified AI factory delivering 60 exaFLOPS of compute. Sovereign AI factory deployments, which governments and large enterprises are building to create independent AI infrastructure, are being architected around Vera Rubin PODs.

DSX Max-Q enables 30% more infrastructure per fixed power envelope, while DSX Flex makes AI factories grid-flexible assets that can unlock 100 gigawatts of previously stranded grid power — addressing the energy availability constraints that have become one of the most significant practical bottlenecks in AI infrastructure expansion.

Part Five: Availability, Supply Constraints, and Real Deployment

Timeline

NVIDIA confirmed at GTC 2026 that Vera Rubin is in full production and that Rubin-based products will be available from partners in the second half of 2026. Among the first cloud providers to deploy Vera Rubin instances will be AWS, Google Cloud, Microsoft Azure, and Oracle Cloud Infrastructure, alongside NVIDIA Cloud Partners CoreWeave, Lambda, and Nebius.

CoreWeave confirmed it will integrate Rubin-based systems into its AI cloud platform beginning in H2 2026. Microsoft will deploy NVL72 rack-scale systems as part of its next-generation Fairwater AI superfactory sites. Nebius Group announced a $27 billion infrastructure deal with Meta including $12 billion in dedicated Vera Rubin capacity.

For individual developers and smaller organizations, the path to Rubin access is cloud instances — not owned hardware. Based on past NVIDIA launch patterns (Hopper datacenter hardware preceded retail H100 PCIe availability by roughly nine months), retail Vera Rubin GPUs are likely a 2027 story.

Supply Constraints

Supply will be constrained through at least mid-2027. Production is bounded by two bottlenecks: TSMC's 3nm capacity — where NVIDIA's 2026 allocation is estimated to produce 200,000 to 300,000 Rubin GPUs — and HBM4 supply from SK Hynix and Samsung, both of which began HBM4 mass production in late 2025 with yields still below mature HBM3e levels.

Each Rubin GPU requires 288 GB of HBM4 — roughly six times the memory per device compared to consumer GPUs — representing an extraordinary demand on HBM4 production at the component level. Organizations that have not secured Rubin capacity through direct purchase agreements or cloud provider reservations should expect 20 to 30 week lead times once volume production normalizes.

The transition to liquid cooling is also a non-trivial infrastructure requirement. Vera Rubin NVL72 requires 100% liquid cooling — air-cooled configurations do not exist. Retrofit costs for data centers designed around air cooling range from $500 to $1,500 per kW depending on existing infrastructure, adding $60,000 to $195,000 per Rubin rack in cooling infrastructure alone. Rubin systems also support NVIDIA's new 800V DC power architecture, a departure from the 48V distribution standard in previous data center designs, requiring additional infrastructure upgrades.

What About Blackwell Now?

Blackwell remains the most capable AI hardware available until Rubin partner availability begins in H2 2026. B300 (Blackwell Ultra) began shipping in January 2026 and represents a meaningful improvement over the B200. B300 lead times have dropped from 36 weeks to 18 weeks as demand stabilizes ahead of the Rubin transition. For organizations that cannot wait for Rubin availability or whose workloads are well-served by Blackwell's architecture, the B300 remains a compelling platform for 2026 deployment.

Part Six: Who Is Buying Vera Rubin — and What They Are Planning to Do With It

The roster of AI labs and enterprises publicly committed to the Vera Rubin platform is the most comprehensive NVIDIA has ever assembled at launch.

Anthropic — the AI safety company and developer of the Claude model family — is explicitly named in NVIDIA's GTC 2026 announcements as a Vera Rubin platform partner. The mention by Sundar Pichai at the announcement that "enterprises and developers are using Claude for increasingly complex" tasks signals joint positioning of Vera Rubin as Claude's inference infrastructure.

OpenAI, Meta, Mistral AI, Cohere, xAI, Perplexity, Harvey, Black Forest Labs, Cursor, Runway, and Thinking Machines Lab are all named as organizations looking to the Rubin platform for training larger models and serving long-context, multimodal systems.

Microsoft is deploying NVL72 at its Fairwater AI superfactory sites, intended to scale to hundreds of thousands of Vera Rubin Superchips — among the largest single AI infrastructure commitments announced in 2026.

The pattern across these organizations: they are building or serving trillion-parameter models with million-token context requirements. These are the exact workloads that Vera Rubin's architecture was designed to serve, and the fact that essentially every major frontier AI lab has committed to the platform is the strongest independent signal of the architecture's capability.

Part Seven: Rubin Ultra and What Comes After

NVIDIA has already previewed the generation after Vera Rubin: Rubin Ultra, confirmed for 2027, connecting two Rubin compute dies to double performance to 100 petaFLOPS of FP4 compute per chip. Rubin Ultra will carry approximately 500 billion transistors and 384 GB of HBM4E memory.

The generation after Rubin Ultra — already named Feynman — is on the roadmap for 2028, continuing NVIDIA's annual cadence that has taken the company from Hopper (2022) to Vera Rubin (H2 2026) in four generations. This pace of advancement is historically unprecedented in the semiconductor industry and represents one of the most significant competitive moats in modern technology: no other company is executing on this cadence of GPU architecture improvement.

The Verdict: Does Vera Rubin Deliver on Its Promise?

The 10x inference cost reduction claim will not be independently verified until H2 2026 production deployments have been in operation long enough for comprehensive benchmarking. The "up to" qualifier is real, and real-world results will vary by workload, architecture, and deployment configuration.

What can be assessed now is whether the architectural decisions behind the claim are sound — and on that basis, the answer is yes.

The combination of 5x per-chip FP4 compute improvement, 2.8x memory bandwidth uplift via HBM4, doubled NVLink 6 interconnect bandwidth eliminating MoE communication bottlenecks, and a purpose-built hybrid GPU-LPU inference architecture targeting the specific decode bottleneck that GPU-only systems cannot efficiently solve — these are not marketing claims. They are genuine architectural advances that address the real constraints on inference efficiency in current-generation hardware.

The 4x reduction in GPUs required for MoE training is perhaps the most practically verifiable near-term claim — it is a training efficiency figure that can be directly benchmarked — and if it holds at scale, it alone dramatically changes the economics of frontier model development.

For organizations building or serving trillion-parameter AI models at scale, Vera Rubin represents the most significant infrastructure upgrade since the first Transformer-optimized GPU arrived. For developers accessing AI through cloud APIs, the downstream effect is AI services that become progressively less expensive and more capable to deliver — and the platforms running them becoming more economically viable.

NVIDIA named this architecture after an astronomer who discovered an invisible force shaping the visible universe. Whether intentional or not, the metaphor works: the inference economics that Vera Rubin is designed to improve are the invisible force shaping every AI product, every AI company, and every AI decision that will be made in the next decade.

Vera Rubin partner availability begins H2 2026. Cloud access through AWS, Azure, Google Cloud, and Oracle Cloud Infrastructure, as well as CoreWeave, Lambda, and Nebius, will be the primary route for most organizations in 2026.

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