The "3x performance race" framing is not marketing hyperbole. Both platforms have delivered genuine multi-generational leaps in the benchmarks that matter most:
Google's Trillium delivers up to 4.7x more peak compute performance over its predecessor TPU v5e, and a 3.8x performance boost on the GPT-3 training task in MLPerf benchmarks. NVIDIA's Blackwell B200, NVIDIA Blackwell vs. Google Trillium: Who Wins the 3x Performance Race?, delivers roughly double the performance of the H100 across key training and inference tasks, with FP4 support enabling compute density improvements that previous architectures could not approach.
Both numbers are real. Both are significant. And answering which platform "wins" requires being precise about what the contest is actually measuring — because on different metrics, in different contexts, and at different scales, the winner changes.
This article provides that precision.
Setting the Stage: Two Architectures, Two Philosophies
Before the benchmarks, the architecture — because the numbers only make sense in context.
NVIDIA Blackwell: The Universal Engine
The Blackwell architecture, embodied primarily in the B200 GPU and the GB200 NVL72 rack-scale system, represents NVIDIA's answer to the next generation of AI workloads. It is, in its deepest conception, a universal compute engine — designed to be the best single platform for training, fine-tuning, and inference across every framework, every model architecture, and every cloud provider.
The B200 delivers approximately 4.6 petaFLOPS FP8 per chip, with 192 GB of HBM3e running at roughly 8 TB/s of memory bandwidth. In the GB200 NVL72 configuration — 72 GPUs in a single NVLink domain — it achieves compute densities that make the previous H100 generation look modest by comparison. NVLink 5 doubles the GPU-to-GPU bandwidth over NVLink 4, and the introduction of native FP4 support (bringing 4-bit precision to mainstream use) doubles arithmetic throughput over FP8 for compatible workloads.
The key architectural advancement in Blackwell is the second-generation Transformer Engine, which now handles FP4 and FP6 precision dynamically, adjusting precision layer-by-layer rather than globally — delivering maximum throughput where precision can be reduced without sacrificing accuracy.
NVIDIA's deepest advantage is not in the chip. It is in CUDA — the programming model that has underpinned GPU computing for nearly two decades. CUDA, cuDNN, TensorRT, and Triton represent a mature software stack that millions of developers rely on for production stability. Every major AI framework — PyTorch, TensorFlow, JAX, ONNX — runs on CUDA natively and has been optimised against it for years. The barrier to running any AI workload on NVIDIA hardware is essentially zero: if it runs anywhere, it runs on CUDA.
Google Trillium (TPU v6): The Specialist
Trillium — Google's sixth-generation TPU — represents the opposite philosophy. Rather than being programmable for any workload, Trillium is co-designed specifically for the matrix multiplication operations that constitute the computational core of neural network training and inference. By removing the general-purpose programmability overhead that GPUs carry, Trillium concentrates silicon resources on the specific operations that AI workloads actually perform.
Trillium delivers approximately 4.7x more peak BF16 compute performance over TPU v5e — bringing per-chip BF16 peak performance to roughly 925 teraFLOPS on the Trillium chip, up from 197 TFLOPS on v5e. In an 8-chip TPU v6e configuration — the standard Google Cloud serving unit — the combined system delivers approximately 7,344 TFLOPS, closely rivaling a quad-H100 NVL system at 6,682 TFLOPS while using substantially less power.
Several architectural improvements distinguish Trillium from its predecessors:
- Doubled HBM memory over TPU v5e (which carried only 16 GB of HBM2)
- Doubled inter-chip interconnect bandwidth — from 1,600 Gbps to 3,200 Gbps per chip
- Third-generation SparseCores — an intermediary processing layer positioned close to HBM, accelerating the irregular memory access patterns common in recommendation models and MoE architectures
- AMD EPYC CPU host (replacing Intel Xeon in previous generations) — a supply chain and cost optimisation that also improves host-to-accelerator bandwidth
Supercomputers assembled from Trillium can connect tens of thousands of pods, each with 256 chips, through a multi-petabit-per-second data centre network with Google's Multislice technology distributing workloads across the fabric with high uptime guarantees. The scale ceiling is different in kind from what NVIDIA's NVLink domain approach provides — but it operates within Google Cloud exclusively.
The Performance Numbers: What Benchmarks Actually Show
Raw specification sheets tell part of the story. Benchmarks under standardised conditions tell more — and the MLPerf results are the most credible independent measurement available for this comparison.
MLPerf Training: The Head-to-Head That Matters
The MLPerf v4.1 training benchmarks provided the most direct comparison between Trillium and Blackwell at their respective launch periods.
GPT-3 training: A system of 6,144 TPU v5p chips reached the GPT-3 training checkpoint in 11.77 minutes. An 11,616-chip NVIDIA H100 system completed the same task in 3.44 minutes — approximately 3.4x faster. The top TPU system was only about 25 seconds faster than an H100 system half its size, suggesting the TPU configuration required roughly double the chip count to achieve similar throughput on this particular benchmark.
Against Trillium specifically (not v5p): in a 2,048-chip head-to-head configuration, Trillium shaved approximately 2 minutes off v5p's 29.6-minute GPT-3 training time — an 8% improvement. Against TPU v5e (the efficiency-focused previous generation), Trillium delivered a 3.8x performance boost on the same GPT-3 task — the number Google most prominently cited at launch.
The honest interpretation: on raw training throughput at equivalent chip counts, NVIDIA's Blackwell-era hardware leads. A well-configured Blackwell cluster processes frontier training jobs faster per chip than a Trillium cluster of the same size. NVIDIA outpaces TPUs on per-device throughput.
The Scale Inversion: Where TPUs Lead
The benchmark comparison above is incomplete without its most important footnote: Google's advantage is not at equivalent chip counts — it is at cluster scale.
At the pod and supercomputer level, TPU architecture achieves near-linear scaling efficiency that NVIDIA's NVLink domain approach cannot currently match. An NVLink 5 domain tops out at 72 GPUs in an NVL72 rack. Achieving the scale of a 9,600-chip TPU 8t superpod from NVIDIA requires significantly more complex external networking with the associated bandwidth and latency penalties. Google's architecture allows for massive scale-up: fewer duplicated systems and more streamlined infrastructure. A TPU pod can house thousands of chips all working in synchrony.
For frontier model training — where the world's largest language models require distributed training across hundreds of thousands of chips — this scale-up advantage is not theoretical. It is the reason Google can train Gemini at a scale that NVIDIA hardware alone, deployed at equivalent total compute, cannot efficiently replicate. NVIDIA may have the superior architecture at the single-chip level, but for large-scale distributed training they currently have nothing that rivals Google's interconnect scalability. A rackscale NVIDIA system, by comparison, faces meaningful networking constraints at the largest scales.
Inference: Where the Economics Shift Most Dramatically
The most consequential comparison in 2026 is not training — it is inference, because inference is where AI compute spend is concentrating. By 2030, inference will consume approximately 75% of all AI compute, creating a $255 billion market growing at 19.2% annually.
Here the TPU case strengthens considerably.
Throughput at scale: An 8-chip Trillium (TPU v6e) configuration achieves approximately 2,175 tokens per second on Llama-2 70B at the time of its first benchmarks. Trillium was expected to double or triple that figure in fully optimised configurations. NVIDIA's single-GPU throughput is higher per chip — around 11,800 tokens per second on Llama-2 13B and 31,000 tokens per second on Llama-2 70B across larger GPU systems — but Google achieves linear scaling and excellent aggregate efficiency at pod scale, while NVIDIA's per-token costs at equivalent scale are higher.
Real-world cost data is the most compelling evidence. Midjourney migrated its inference infrastructure from NVIDIA GPUs to Trillium TPUs and saw monthly inference spend drop from $2.1 million to under $700,000 — annualised savings of $16.8 million — while maintaining output quality. That is a 67% cost reduction at production scale.
Google Cloud pricing: Committed-use discounts push TPU v6e pricing as low as $0.39 per chip-hour. TPU v6e offers up to 4x better performance per dollar compared to NVIDIA H100 for large language model training, recommendation systems, and large-batch inference. For hyperscale AI services running billions of inferences daily, those economics are transformational.
Anthropic's strategic bet: Anthropic closed the largest TPU deal in Google's history in November 2025, committing to hundreds of thousands of Trillium chips in 2026 and scaling toward one million by 2027. The company that built Claude — trained primarily on NVIDIA hardware — concluded that TPUs offer superior economics for inference at scale. This is not a small signal. It is one of the highest-conviction data points available about real-world inference economics at the frontier.
The Energy Efficiency Story: Why Power Is the Hidden Variable
Energy consumption has become a critical bottleneck for data centres in 2026, and on this metric Google's architecture holds a durable structural advantage.
The TPU v6e/Trillium architecture delivers approximately 300W TDP per chip, compared to the NVIDIA H100's 700W. The Blackwell B200 draws more power still — in a GB200 NVL72 rack, total system power can reach 120+ kW for the full 72-GPU configuration. Trillium delivers roughly double the performance per watt compared to previous TPU generations through architectural simplification and advanced liquid cooling.
The performance-per-watt comparison between Trillium and Blackwell is not simply about electricity bills. It determines how much AI compute can be deployed within a given power budget — a constraint that has become as binding as chip availability for large data centre operators. Google TPU v7 (Ironwood) delivers roughly 2.8x better performance per watt than NVIDIA's H100, and still exceeds the newer Blackwell GPUs in energy efficiency by a meaningful margin.
For enterprises, this translates directly to total cost of ownership. The combination of chip price, energy usage, and performance — what the industry calls TCO — almost always favours TPUs for qualifying sustained inference workloads. The challenge is identifying those qualifying workloads and engineering teams capable of reaching TPU performance ceilings.
The Ecosystem Gap: NVIDIA's Moat That Numbers Cannot Capture
Performance data is where Google competes well. Ecosystem is where NVIDIA's advantage is deepest and most durable.
CUDA underpins nearly all mainstream AI frameworks: PyTorch, TensorFlow, JAX, and ONNX all run on CUDA natively. Every major model release — whether from OpenAI, Anthropic, Meta, Mistral, or any research institution — is first validated on NVIDIA hardware. Every AI infrastructure tool, every profiling framework, every debugging environment assumes CUDA availability as baseline.
TPUs require XLA (Accelerated Linear Algebra) compilation, which introduces a meaningful engineering barrier. Code that runs on NVIDIA hardware must be adapted, sometimes substantially, to achieve peak performance on TPUs. Moving from NVIDIA to Google's TPU stack often means rewriting large parts of existing code — a major barrier for smaller teams and for organisations whose engineering capacity is limited. The maturity of the JAX/XLA/Pathways ecosystem has improved significantly, and vLLM now achieves 2-5x performance improvements on TPUs for qualified configurations. But the gap relative to CUDA's universality remains real.
TPUs are also available only through Google Cloud — not AWS, not Azure, not Oracle Cloud, not on-premise. For organisations with multi-cloud requirements, regulatory constraints that prevent cloud-vendor lock-in, or existing infrastructure investments in non-Google environments, TPUs are simply unavailable regardless of their performance or cost profile. Unlike NVIDIA's broad ecosystem spanning enterprise, cloud, workstation, and edge deployments, TPUs serve a narrower market segment.
This matters commercially at a scale beyond individual enterprise decisions. Broadcom's TPU supply agreement with Anthropic has reached $21 billion through end 2026 — a figure that illustrates both the commercial scale of the TPU ecosystem and its concentration. With production estimates pointing to approximately 3 million TPUs in 2026, 5 million in 2027, and 7 million in 2028, the ecosystem is scaling — but within a narrower addressable market than NVIDIA's.
NVIDIA retains advantages in flexibility, ecosystem breadth, and multi-platform availability.
Head-to-Head Summary
| Dimension | NVIDIA Blackwell (B200/GB200) | Google Trillium (TPU v6/v6e) |
|---|---|---|
| Per-chip compute | ~4.6 PF FP8, 192 GB HBM3e | ~925 TFLOPS BF16, up from v5e |
| Memory bandwidth | ~8 TB/s | ~7.4 TB/s (8-chip pod) |
| Single-chip training | ⭐⭐⭐⭐⭐ Best in class | ⭐⭐⭐⭐ Strong |
| Cluster-scale training | ⭐⭐⭐⭐ NVL72 domain limit | ⭐⭐⭐⭐⭐ Near-linear to 256k+ chips |
| Inference throughput | ⭐⭐⭐⭐⭐ Highest per chip | ⭐⭐⭐⭐ Excellent at pod scale |
| Inference cost ($/token) | ⭐⭐⭐ Competitive | ⭐⭐⭐⭐⭐ Best at hyperscale |
| Energy efficiency | ⭐⭐⭐ Good | ⭐⭐⭐⭐⭐ ~2.8× better perf/watt |
| Software ecosystem | ⭐⭐⭐⭐⭐ CUDA — universal | ⭐⭐⭐ JAX/XLA — improving |
| Availability | Multi-cloud, on-premise | Google Cloud only |
| Vendor lock-in risk | Low | High |
| Real-world cost evidence | High TCO at hyperscale | Midjourney: 67% cost reduction |
| Best for | Versatility, R&D, multi-cloud | Hyperscale inference, Google AI |
Who Is Winning — and What "Winning" Actually Means
The answer depends on who is counting and what they are counting.
On raw per-chip performance, NVIDIA Blackwell leads. The B200 and GB200 deliver the highest single-device compute density available, with memory specifications closely matching or slightly exceeding Trillium at the chip level. Per-chip throughput on training and inference benchmarks favours NVIDIA in direct comparisons.
On cluster-scale training efficiency, the advantage narrows and may invert at the largest scales. Google's interconnect architecture scales to hundreds of thousands of chips with near-linear efficiency. NVIDIA's NVLink domains cap at 72 GPUs before external networking introduces degradation. For the specific use case of frontier model training at maximum scale — which is what determines who trains the most powerful models in the world — Google's architecture holds a structural advantage that Blackwell's per-chip lead does not overcome.
On inference economics at hyperscale, Google's advantage is the most practically significant and the most clearly evidenced. Midjourney's $16.8M annualised savings are not a benchmark. They are a production outcome. Anthropic's commitment to scaling toward one million Trillium TPUs is not a theoretical position. It is the largest infrastructure bet by one of the world's most technically sophisticated AI companies. The inference economics case for TPUs is real, documented, and growing.
On ecosystem and versatility, NVIDIA remains dominant and will remain dominant for the foreseeable future. The CUDA ecosystem is not simply a software advantage — it is infrastructure for global AI research that no single organisation can replicate in years, let alone months.
The competition is not zero-sum, and the honest framing is this: NVIDIA wins on performance, ecosystem, and versatility. Google wins on scale economics, energy efficiency, and cluster coherence. The future of AI compute is likely heterogeneous — NVIDIA providing the universal research and development platform, Google providing the cost-optimised hyperscale inference infrastructure — rather than one displacing the other.
NVIDIA is going to be just fine. TPUs are having a moment. Both can be true simultaneously.
What Comes Next: The Race Into 2027
Neither platform is standing still. The competitive landscape will shift materially in the next 12 to 18 months.
Google's TPU 8t and 8i — announced at Cloud Next 2026 and scheduled for general availability later this year — extend the architecture's lead in the specific dimensions where it already excels. The 8t delivers 2.8x training price-performance over the previous Ironwood generation. The 8i delivers 80% inference price-performance improvement. Both are fabricated on TSMC's N3 process, the same node as Blackwell.
NVIDIA's Vera Rubin arrives in H2 2026 with 50 PFLOPS NVFP4 inference per package, HBM4 at 22 TB/s, and NVLink 6. Rubin Ultra in H2 2027 targets 100 PFLOPS FP4. Kyber NVL576 will eventually bind 576 Rubin Ultra GPUs in a single rack. NVIDIA is also applying the training/inference specialisation logic it observed in Google's architecture: Rubin introduces the CPX chip specifically for the compute-intensive prefill phase of inference, with decode handled by the main high-memory Rubin GPUs.
The convergence is notable. Both companies are now building specialised hardware for training and inference separately. NVIDIA, having observed Google's bifurcation strategy with TPU 8t and 8i, is implementing a version of the same insight within its own architecture — a strong signal that workload specialisation is the correct direction, not a Google-specific idiosyncrasy.
Google's strategy is also not without risk. If it decides to sell TPUs externally — including to Meta, which is reportedly in discussions for a multi-billion-dollar deal — it reduces a key competitive advantage for its own cloud hosting. Every TPU sold to a competitor is silicon that helps a competitor's AI infrastructure rather than Google's own model training and serving operations.
Conclusion: The Right Question Is Not Who Wins — It Is Who Wins at What
The Blackwell vs. Trillium race is not a race with a single finishing line. It is a competition being run on multiple tracks simultaneously, with different leaders at different distances.
If your organisation is training experimental model architectures and needs to run on PyTorch with standard CUDA tooling across multiple cloud providers, Blackwell is the answer. The ecosystem, the flexibility, and the per-chip performance make it the universal choice for AI research and development.
If your organisation is running billions of inference requests daily against large language models on Google Cloud, the TPU economics case — validated by Midjourney's numbers, endorsed by Anthropic's commitment — makes Trillium and its successors the operationally rational choice.
The most sophisticated AI organisations in 2026 are not making binary choices. They are designing heterogeneous infrastructure — NVIDIA for research velocity and framework compatibility, TPUs for production inference economics — that takes advantage of each platform's structural strengths without being constrained by either platform's structural limitations.
That is not a failure to find a winner. It is the correct answer to a question the industry spent too long trying to resolve with a single platform.
Quick Reference: Blackwell vs. Trillium at a Glance
| NVIDIA B200 (Blackwell) | Google TPU v6e (Trillium) | |
|---|---|---|
| Peak compute | ~4.6 PF FP8 | ~925 TFLOPS BF16 per chip |
| HBM capacity | 192 GB HBM3e | 256 GB HBM (8-chip config) |
| Memory BW | ~8 TB/s | ~7.4 TB/s |
| Power (TDP) | ~700W (B200) | ~300W |
| Max NVLink/ICI domain | 72 GPUs (NVL72) | 256 chips per pod |
| Cluster ceiling | NVLink + external network | 100k+ chips linear scaling |
| Inference $/token | Higher at hyperscale | Lower (Midjourney: −67%) |
| Framework support | All (CUDA-native) | JAX/XLA primarily |
| Cloud availability | Multi-cloud + on-premise | Google Cloud only |
| Announced next gen | Vera Rubin (H2 2026) | TPU 8t / 8i (H2 2026) |
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